{"id":1276,"date":"2026-09-14T09:21:11","date_gmt":"2026-09-14T09:21:11","guid":{"rendered":"https:\/\/www.icallchip.com\/?post_type=product&p=1276"},"modified":"2026-09-14T09:21:11","modified_gmt":"2026-09-14T09:21:11","slug":"xczu19eg-1ffvd1760e","status":"publish","type":"product","link":"https:\/\/www.icallchip.com\/ru\/product\/xczu19eg-1ffvd1760e\/","title":{"rendered":"XCZU19EG-1FFVD1760E"},"content":{"rendered":"
Datasheet:<\/span><\/div>\n
\n
<\/i>\u00a0XCZU19EG-1FFVD1760E Datasheet (PDF)<\/a><\/p>\n
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Product Attribute<\/th>\nAttribute Value<\/th>\nSelect Attribute<\/th>\n<\/tr>\n
AMD<\/td>\n<\/td>\n<\/tr>\n
Product Category:<\/td>\nSoC FPGA<\/td>\n<\/td>\n<\/tr>\n
Shipping Restrictions:<\/td>\n\n
<\/i>\u00a0This product may require additional documentation to export from the United States.<\/div>\n<\/td>\n
<\/td>\n<\/tr>\n
RoHS:<\/td>\n<\/i>\u00a0Yes<\/td>\n<\/td>\n<\/tr>\n
SMD\/SMT<\/td>\n<\/td>\n<\/tr>\n
FCBGA-1760<\/td>\n<\/td>\n<\/tr>\n
ARM Cortex A53, ARM Cortex R5, ARM Mali-400 MP2<\/a><\/td>\n<\/td>\n<\/tr>\n
7 Core<\/td>\n<\/td>\n<\/tr>\n
600 MHz, 667 MHz, 1.5 GHz<\/td>\n<\/td>\n<\/tr>\n
2 x 32 kB, 4 x 32 kB<\/td>\n<\/td>\n<\/tr>\n
2 x 32 kB, 4 x 32 kB<\/td>\n<\/td>\n<\/tr>\n
1143450 LE<\/td>\n<\/td>\n<\/tr>\n
65340 ALM<\/td>\n<\/td>\n<\/tr>\n
34.6 Mbit<\/td>\n<\/td>\n<\/tr>\n
850 mV<\/td>\n<\/td>\n<\/tr>\n
0 C<\/td>\n<\/td>\n<\/tr>\n
+ 100 C<\/td>\n<\/td>\n<\/tr>\n
Brand:<\/td>\nAMD \/ Xilinx<\/td>\n<\/td>\n<\/tr>\n
Distributed RAM:<\/td>\n9.8 Mbit<\/td>\n<\/td>\n<\/tr>\n
Embedded Block RAM – EBR:<\/td>\n34.6 Mbit<\/td>\n<\/td>\n<\/tr>\n
Moisture Sensitive:<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
Number of Logic Array Blocks – LABs:<\/td>\n65340 LAB<\/td>\n<\/td>\n<\/tr>\n
Number of Transceivers:<\/td>\n72 Transceiver<\/td>\n<\/td>\n<\/tr>\n
Product Type:<\/td>\nSoC FPGA<\/td>\n<\/td>\n<\/tr>\n
Series:<\/td>\nXCZU19EG<\/a><\/td>\n<\/td>\n<\/tr>\n
<\/td>\n12<\/td>\n<\/td>\n<\/tr>\n
Subcategory:<\/td>\nSOC – Systems on a Chip<\/td>\n<\/td>\n<\/tr>\n
Tradename:<\/td>\nZynq UltraScale+<\/a><\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n
<\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"
\n